fixed equalizerの例文
- The thesis is composed of 9 parts : the background , significance , main topics and innovations in the thesis are introduced in chapter 1 ; in chapter 2 , the main function and performance of interface circuits are described from the view of system by using the example of gigabit ethernet ' s transceiver ; the transmission media ' s frequency characteristics and model are analyzed for the high - speed data transmission system in chapter 3 ; the line driver is presented in chapter 4 ; the equalization principles for high - speed data transmission system are introduced in chapter 5 ; a novel adaptive equalizer for 1000base - cx transceiver is presented in chapter 6 ; in chapter 7 , a fixed equalizer for 2 . 5gbps transceiver is described ; in chapter 8 , layout design and measured results are discussed ; at last , the conclusions are drawn in chapter 9 . during period of finishing the thesis , i read lots of literatures about the interface circuits in high - speed data transmission system , studied their principles and design techniques , and designed : 1 、 the line driver for 2 . 5gbps baseband copper cable transceiver ; 2 、 the fixed equalizer for 2 . 5gbps baseband copper cable transceiver ; 3 、 the fixed equalizer for 1 . 5gbps sata ( serial at attachment ) transceiver ; 4 、 an adaptive equalizer for 1000base - cx transceiver
